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ddr3_mr_gen: Also display RZQ/x on configured electrical settings.

This commit is contained in:
Florent Kermarrec 2022-02-24 16:33:46 +01:00
parent 70c1491d1c
commit 3f84cc9116
1 changed files with 3 additions and 3 deletions
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6
bench/ddr3_mr_gen.py
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@ -134,9 +134,9 @@ print(f"cl: {args.cl}")
print(f"cwl: {args.cwl}") print(f"cwl: {args.cwl}")
print("DDR3 Electrical Settings:") print("DDR3 Electrical Settings:")
print(f"rtt_nom: {args.rtt_nom}") print(f"rtt_nom: {args.rtt_nom} {r2rzq(args.rtt_nom)}")
print(f"rtt_wr: {args.rtt_wr}") print(f"rtt_wr: {args.rtt_wr} {r2rzq(args.rtt_wr)}")
print(f"ron: {args.ron}") print(f"ron: {args.ron} {r2rzq(args.ron)}")
print("Commands to be used with LiteX BIOS:") print("Commands to be used with LiteX BIOS:")
print("sdram_mr_write 0 {:d}".format(format_mr0( print("sdram_mr_write 0 {:d}".format(format_mr0(