From 58389534e6c4716c75cbabdae23518c8befe36cd Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Tue, 6 Feb 2018 19:19:14 +0100 Subject: [PATCH] modules: add MT47H64M16 --- litedram/modules.py | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/litedram/modules.py b/litedram/modules.py index ea4d9be..f480921 100644 --- a/litedram/modules.py +++ b/litedram/modules.py @@ -143,6 +143,21 @@ class MT47H128M8(SDRAMModule): tRFC = 127.5 +class MT47H64M16(SDRAMModule): + memtype = "DDR2" + # geometry + nbanks = 8 + nrows = 8192 + ncols = 1024 + # timings + tRP = 15 + tRCD = 15 + tWR = 15 + tWTR = 2 + tREFI = 7800 + tRFC = 127.5 + + class P3R1GE4JGF(SDRAMModule): memtype = "DDR2" # geometry