From 5b72d1a34a89a50a534dcbe76a6237d8d9f8d957 Mon Sep 17 00:00:00 2001
From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Thu, 8 Sep 2022 10:49:54 +0200
Subject: [PATCH] gw2ddrphy: Add TCLK_SOURCE on DQS's OSER4_MEM.

---
 litedram/phy/gw2ddrphy.py | 1 +
 1 file changed, 1 insertion(+)

diff --git a/litedram/phy/gw2ddrphy.py b/litedram/phy/gw2ddrphy.py
index fbb444e..a0c037b 100644
--- a/litedram/phy/gw2ddrphy.py
+++ b/litedram/phy/gw2ddrphy.py
@@ -319,6 +319,7 @@ class GW2DDRPHY(Module, AutoCSR):
             dqs_o_oen = Signal()
             self.specials += [
                 Instance("OSER4_MEM",
+                    p_TCLK_SOURCE = "DQSW",
                     i_RESET = ResetSignal("sys"),
                     i_PCLK  = ClockSignal("sys"),
                     i_FCLK  = ClockSignal("sys2x"),