diff --git a/litedram/phy/s6ddrphy.py b/litedram/phy/s6ddrphy.py
index 67829c3..d92cacc 100644
--- a/litedram/phy/s6ddrphy.py
+++ b/litedram/phy/s6ddrphy.py
@@ -421,6 +421,7 @@ class S6QuarterRateDDRPHY(Module):
 
         self.settings = PhySettings(
             memtype="DDR3",
+            databits=databits,
             dfi_databits=2*databits,
             nranks=nranks,
             nphases=nphases,