diff --git a/test/reference/ddr3_init.h b/test/reference/ddr3_init.h index d772943..163a0fc 100644 --- a/test/reference/ddr3_init.h +++ b/test/reference/ddr3_init.h @@ -20,6 +20,8 @@ #define SDRAM_PHY_DATABITS 64 #define SDRAM_PHY_PHASES 4 #define SDRAM_PHY_CMD_LATENCY 1 +#define SDRAM_PHY_RDPHASE 1 +#define SDRAM_PHY_WRPHASE 1 #define SDRAM_PHY_WRITE_LEVELING_CAPABLE #define SDRAM_PHY_READ_LEVELING_CAPABLE #define SDRAM_PHY_MODULES DFII_PIX_DATA_BYTES/2 @@ -49,14 +51,6 @@ __attribute__((unused)) static void command_p3(int cmd) sdram_dfii_pi3_command_issue_write(1); } - -#define sdram_dfii_pird_address_write(X) sdram_dfii_pi1_address_write(X) -#define sdram_dfii_piwr_address_write(X) sdram_dfii_pi1_address_write(X) -#define sdram_dfii_pird_baddress_write(X) sdram_dfii_pi1_baddress_write(X) -#define sdram_dfii_piwr_baddress_write(X) sdram_dfii_pi1_baddress_write(X) -#define command_prd(X) command_p1(X) -#define command_pwr(X) command_p1(X) - #define DFII_PIX_DATA_SIZE CSR_SDRAM_DFII_PI0_WRDATA_SIZE const unsigned long sdram_dfii_pix_wrdata_addr[SDRAM_PHY_PHASES] = { diff --git a/test/reference/ddr4_init.h b/test/reference/ddr4_init.h index e4359ec..d832509 100644 --- a/test/reference/ddr4_init.h +++ b/test/reference/ddr4_init.h @@ -20,6 +20,8 @@ #define SDRAM_PHY_DATABITS 64 #define SDRAM_PHY_PHASES 4 #define SDRAM_PHY_CMD_LATENCY 1 +#define SDRAM_PHY_RDPHASE 3 +#define SDRAM_PHY_WRPHASE 2 #define SDRAM_PHY_WRITE_LEVELING_CAPABLE #define SDRAM_PHY_WRITE_LEVELING_REINIT #define SDRAM_PHY_READ_LEVELING_CAPABLE @@ -50,14 +52,6 @@ __attribute__((unused)) static void command_p3(int cmd) sdram_dfii_pi3_command_issue_write(1); } - -#define sdram_dfii_pird_address_write(X) sdram_dfii_pi3_address_write(X) -#define sdram_dfii_piwr_address_write(X) sdram_dfii_pi2_address_write(X) -#define sdram_dfii_pird_baddress_write(X) sdram_dfii_pi3_baddress_write(X) -#define sdram_dfii_piwr_baddress_write(X) sdram_dfii_pi2_baddress_write(X) -#define command_prd(X) command_p3(X) -#define command_pwr(X) command_p2(X) - #define DFII_PIX_DATA_SIZE CSR_SDRAM_DFII_PI0_WRDATA_SIZE const unsigned long sdram_dfii_pix_wrdata_addr[SDRAM_PHY_PHASES] = { diff --git a/test/reference/sdr_init.h b/test/reference/sdr_init.h index 5f7b081..5d1178c 100644 --- a/test/reference/sdr_init.h +++ b/test/reference/sdr_init.h @@ -19,6 +19,8 @@ #define SDRAM_PHY_XDR 1 #define SDRAM_PHY_DATABITS 16 #define SDRAM_PHY_PHASES 1 +#define SDRAM_PHY_RDPHASE 0 +#define SDRAM_PHY_WRPHASE 0 static void cdelay(int i); @@ -28,14 +30,6 @@ __attribute__((unused)) static void command_p0(int cmd) sdram_dfii_pi0_command_issue_write(1); } - -#define sdram_dfii_pird_address_write(X) sdram_dfii_pi0_address_write(X) -#define sdram_dfii_piwr_address_write(X) sdram_dfii_pi0_address_write(X) -#define sdram_dfii_pird_baddress_write(X) sdram_dfii_pi0_baddress_write(X) -#define sdram_dfii_piwr_baddress_write(X) sdram_dfii_pi0_baddress_write(X) -#define command_prd(X) command_p0(X) -#define command_pwr(X) command_p0(X) - #define DFII_PIX_DATA_SIZE CSR_SDRAM_DFII_PI0_WRDATA_SIZE const unsigned long sdram_dfii_pix_wrdata_addr[SDRAM_PHY_PHASES] = {