From 6ddc2c83e44aad31f252deb889d6d464505c8bf1 Mon Sep 17 00:00:00 2001
From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Sat, 27 Apr 2019 09:46:59 +0200
Subject: [PATCH] README: update

---
 README | 27 ++++++++++++++-------------
 1 file changed, 14 insertions(+), 13 deletions(-)

diff --git a/README b/README
index 556fc6a..05a86cc 100644
--- a/README
+++ b/README
@@ -3,10 +3,10 @@
        / /__/ / __/ -_) // / , _/ __ |/ /|_/ /
       /____/_/\__/\__/____/_/|_/_/ |_/_/  /_/
 
-           Copyright 2015-2018 / EnjoyDigital
+           Copyright 2015-2019 / EnjoyDigital
 
        A small footprint and configurable DRAM core
-                powered by LiteX & Migen
+                powered by Migen & LiteX
 
 [> Intro
 --------
@@ -28,12 +28,13 @@ PHY:
   - Spartan6 DDR/LPDDR/DDR2/DDR3 PHY (1:2 or 1:4 frequency ratio)
   - Spartan7/Artix7/Kintex7/Virtex7 DDR2/DDR3 PHY (1:2 or 1:4 frequency ratio)
   - Kintex/Virtex Ultrascale DDR3/DDR4 PHY (1:4 frequency ratio)
+  - ECP5 DDR3 PHY (1:4 frequency ratio)
 Core:
   - Fully pipelined, high performance.
   - Configurable commands depth on bankmachines.
   - Auto-Precharge.
 Frontend:
-  - Configurable crossbar (simply declare your crossbar and use crossbar.get_port() to add a new port!)
+  - Configurable crossbar (simply use crossbar.get_port() to add a new port!)
   - Ports arbitration transparent to the user.
   - Native, AXI-MM or Wishbone user interface.
   - DMA reader/writer.
@@ -44,13 +45,14 @@ Frontend:
 ---------------
 LiteDRAM is already used in commercial and open-source designs:
 - HDMI2USB: http://hdmi2usb.tv/home/
+- NeTV2: https://www.crowdsupply.com/alphamax/netv2
+- USBSniffer: http://blog.lambdaconcept.com/doku.php?id=products:usb_sniffer
 - and others commercial designs...
 
 [> Possible improvements
 ------------------------
 - add Avalon-ST interface.
-- add support for Altera PHYs.
-- add support for Lattice PHYs.
+- add support for Altera devices.
 - add more documentation
 - ... See below Support and consulting :)
 
@@ -59,16 +61,15 @@ enjoy-digital.fr.
 
 [> Getting started
 ------------------
-1. Install Python 3.5, Migen and FPGA vendor's development tools.
-   Get Migen from: https://github.com/m-labs/migen
+0. Install Python 3.5+ and FPGA vendor's development tools.
 
-2. Obtain LiteX and install it:
-  git clone https://github.com/enjoy-digital/litex --recursive
-  cd litex
-  python3 setup.py develop
-  cd ..
+1. Install Migen/LiteX and the LiteX's cores:
+  wget https://raw.githubusercontent.com/enjoy-digital/litex/master/litex_setup.py
+  ./litex_setup.py init install
+  Later, if you need to update all repositories:
+  ./litex_setup.py update
 
-3. TODO: add/describe examples
+2. TODO: add/describe examples
 
 [> Tests
 --------