From 981d5a077bcf16251dbb7f7eb13127799bdfbfea Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Wed, 28 Apr 2021 17:54:25 +0200 Subject: [PATCH] init: Disable DQ-DQS training on Ultrascale(+) for now (requires more testing). --- litedram/init.py | 2 ++ 1 file changed, 2 insertions(+) diff --git a/litedram/init.py b/litedram/init.py index fc6c289..0a1c42f 100644 --- a/litedram/init.py +++ b/litedram/init.py @@ -689,6 +689,8 @@ def get_sdram_phy_c_header(phy_settings, timing_settings): "K7DDRPHY", "V7DDRPHY", "K7LPDDR4PHY", "V7LPDDR4PHY"]: r += "#define SDRAM_PHY_WRITE_LEVELING_CAPABLE\n" + if phytype in ["K7DDRPHY", "V7DDRPHY", + "K7LPDDR4PHY", "V7LPDDR4PHY"]: r += "#define SDRAM_PHY_WRITE_DQ_DQS_TRAINING_CAPABLE\n" if phytype in ["USDDRPHY", "USPDDRPHY", "A7DDRPHY", "K7DDRPHY", "V7DDRPHY",