diff --git a/litedram/bus.py b/litedram/common.py
similarity index 96%
rename from litedram/bus.py
rename to litedram/common.py
index a772946..ff1e6a6 100644
--- a/litedram/bus.py
+++ b/litedram/common.py
@@ -2,7 +2,6 @@ from functools import reduce
 from operator import or_
 
 from litex.gen import *
-from litex.gen.genlib.record import *
 
 
 class Interface(Record):
diff --git a/litedram/core/controller.py b/litedram/core/controller.py
index fb56cf6..ee0529c 100644
--- a/litedram/core/controller.py
+++ b/litedram/core/controller.py
@@ -1,7 +1,7 @@
 from litex.gen import *
 
 from litedram.phy import dfi
-from litedram import bus
+from litedram import common
 from litedram.core.refresher import *
 from litedram.core.bankmachine import *
 from litedram.core.multiplexer import *
@@ -30,7 +30,7 @@ class LiteDRAMController(Module):
             geom_settings.bankbits,
             phy_settings.dfi_databits,
             phy_settings.nphases)
-        self.lasmic = bus.Interface(
+        self.lasmic = common.Interface(
             aw=geom_settings.rowbits + geom_settings.colbits - address_align,
             dw=phy_settings.dfi_databits*phy_settings.nphases,
             nbanks=2**geom_settings.bankbits,
diff --git a/litedram/frontend/crossbar.py b/litedram/frontend/crossbar.py
index e8e7f06..a8e2646 100644
--- a/litedram/frontend/crossbar.py
+++ b/litedram/frontend/crossbar.py
@@ -4,7 +4,7 @@ from operator import or_
 from litex.gen import *
 from litex.gen.genlib import roundrobin
 
-from litedram.bus import *
+from litedram.common import *
 
 
 class LiteDRAMCrossbar(Module):