From 9a255062e0a82d050877a1a6309e331aae0b8416 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Mon, 26 Nov 2018 08:56:00 +0100 Subject: [PATCH] frontend/wishbone: fix wishbone.err on LiteDRAMWishbone2AXI --- litedram/frontend/wishbone.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/litedram/frontend/wishbone.py b/litedram/frontend/wishbone.py index 3cb47e5..a83bb8b 100644 --- a/litedram/frontend/wishbone.py +++ b/litedram/frontend/wishbone.py @@ -92,7 +92,7 @@ class LiteDRAMWishbone2AXI(Module): port.r.ready.eq(1), wishbone.dat_r.eq(port.r.data), wishbone.ack.eq(1), - wishbone.err.eq(port.r.resp != 0b10), + wishbone.err.eq(port.r.resp != 0b00), NextState("IDLE") ) )