From afd00f7873131f1a5cdaf77b0a09d586b1abb0f3 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Tue, 29 Jun 2021 12:38:44 +0200 Subject: [PATCH] bench/common/bench_test: Improve UART dump speed. --- bench/common.py | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/bench/common.py b/bench/common.py index a913763..bce6cd4 100644 --- a/bench/common.py +++ b/bench/common.py @@ -184,8 +184,14 @@ def s7_bench_test(freq_min, freq_max, freq_step, vco_freq, bios_filename, bios_t start = time.time() while (time.time() - start) < bios_timeout: if bus.regs.uart_xover_rxfull.read(): - for c in bus.read(bus.regs.uart_xover_rxtx.addr, 16, burst="fixed"): - print("{:c}".format(c), end="") + length = 16 + elif not bus.regs.uart_xover_rxempty.read(): + length = 1 + else: + time.sleep(1e-3) + continue + for c in bus.read(bus.regs.uart_xover_rxtx.addr, length=length, burst="fixed"): + print("{:c}".format(c), end="") print("") # # # @@ -280,9 +286,15 @@ def us_bench_test(freq_min, freq_max, freq_step, vco_freq, bios_filename, bios_t ctrl.reboot() start = time.time() while (time.time() - start) < bios_timeout: - if bus.regs.uart_xover_rxempty.read() == 0: - for c in bus.read(bus.regs.uart_xover_rxtx.addr, 1, burst="fixed"): - print("{:c}".format(c), end="") + if bus.regs.uart_xover_rxfull.read(): + length = 16 + elif not bus.regs.uart_xover_rxempty.read(): + length = 1 + else: + time.sleep(1e-3) + continue + for c in bus.read(bus.regs.uart_xover_rxtx.addr, length=length, burst="fixed"): + print("{:c}".format(c), end="") print("") # # #