diff --git a/litedram/frontend/dma.py b/litedram/frontend/dma.py
index d151f4a..dcba915 100644
--- a/litedram/frontend/dma.py
+++ b/litedram/frontend/dma.py
@@ -267,7 +267,7 @@ class LiteDRAMDMAWriter(Module, AutoCSR):
                     If(self._loop.storage,
                         NextValue(offset, 0)
                     ).Else(
-                        NextState("IDLE")
+                        NextState("DONE")
                     )
                 )
             )