From b2f1f2938457bdb8c9ecc128296170b262535674 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Tue, 14 Aug 2018 15:13:33 +0200 Subject: [PATCH] core/bankmachine: update comments --- litedram/core/bankmachine.py | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/litedram/core/bankmachine.py b/litedram/core/bankmachine.py index 5f56954..ef542ea 100644 --- a/litedram/core/bankmachine.py +++ b/litedram/core/bankmachine.py @@ -87,6 +87,7 @@ class BankMachine(Module): cmd.is_write)) # Control and command generation FSM + # Note: tRRD, tFAW, tCCD, tWTR timings are enforced by the multiplexer self.submodules.fsm = fsm = FSM() fsm.act("REGULAR", If(self.refresh_req, @@ -95,8 +96,6 @@ class BankMachine(Module): If(has_openrow, If(hit, If(cas_allowed, - # Note: write-to-read specification is enforced by - # multiplexer cmd.valid.eq(1), If(cmd_buffer.source.we, req.wdata_ready.eq(cmd.ready),