From b8339886dabc54cc40b69d081ea544c6c88b682a Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Sat, 22 Feb 2020 19:23:22 +0100 Subject: [PATCH] litedram_gen: add missing ECP5DDRPHY constant --- litedram/gen.py | 1 + 1 file changed, 1 insertion(+) diff --git a/litedram/gen.py b/litedram/gen.py index c779b4a..826318c 100755 --- a/litedram/gen.py +++ b/litedram/gen.py @@ -348,6 +348,7 @@ class LiteDRAMCore(SoCSDRAM): pads = platform.request("ddram"), sys_clk_freq = sys_clk_freq) self.comb += crg.stop.eq(self.ddrphy.init.stop) + self.add_constant("ECP5DDRPHY", None) sdram_module = core_config["sdram_module"](sys_clk_freq, "1:2") if core_config["sdram_phy"] in [litedram_phys.A7DDRPHY, litedram_phys.K7DDRPHY, litedram_phys.V7DDRPHY]: assert core_config["memtype"] in ["DDR2", "DDR3"]