From bf291f523abab0e46e0804f7faade3a0f587222c Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Fri, 29 Apr 2016 08:11:37 +0200 Subject: [PATCH] settings: add MT41K128M16 (Arty) and MT41K256M16 (Nexys video) --- litedram/settings.py | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/litedram/settings.py b/litedram/settings.py index 6f61d1b..89ecdf0 100644 --- a/litedram/settings.py +++ b/litedram/settings.py @@ -194,3 +194,33 @@ class MT41J128M16(SDRAMModule): tWTR = 3 tREFI = 64*1000*1000/16384 tRFC = 260 + + +class MT41K128M16(SDRAMModule): + memtype = "DDR3" + # geometry + nbanks = 8 + nrows = 16384 + ncols = 1024 + # timings (-7 speedgrade) + tRP = 13.75 + tRCD = 13.75 + tWR = 15 + tWTR = 8 + tREFI = 64*1000*1000/8192 + tRFC = 160 + + +class MT41K256M16(SDRAMModule): + memtype = "DDR3" + # geometry + nbanks = 8 + nrows = 32768 + ncols = 1024 + # timings (-7 speedgrade) + tRP = 13.75 + tRCD = 13.75 + tWR = 15 + tWTR = 8 + tREFI = 64*1000*1000/8192 + tRFC = 260