From c16628531a568417dc5e23c0d39388bed9e72166 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Thu, 8 Oct 2020 16:56:22 +0200 Subject: [PATCH] common/BitSlip: allow passing i/o signals as parameters. --- litedram/common.py | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/litedram/common.py b/litedram/common.py index 69eb1a3..dd58618 100644 --- a/litedram/common.py +++ b/litedram/common.py @@ -117,11 +117,11 @@ class PHYPadsCombiner: # BitSlip ------------------------------------------------------------------------------------------ class BitSlip(Module): - def __init__(self, dw, rst=None, slp=None, cycles=1): - self.i = Signal(dw) - self.o = Signal(dw) - self.rst = Signal() if rst is None else rst - self.slp = Signal() if slp is None else slp + def __init__(self, dw, i=None, o=None, rst=None, slp=None, cycles=1): + self.i = Signal(dw) if i is None else i + self.o = Signal(dw) if o is None else o + self.rst = Signal() if rst is None else rst + self.slp = Signal() if slp is None else slp # # #