From d12caf1e0cf8e0b5cc1b7e5e181218e8a26e6aeb Mon Sep 17 00:00:00 2001
From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Thu, 1 Oct 2020 18:29:35 +0200
Subject: [PATCH] common: add TappedDelayLine to simplify delays on control
 signals.

---
 litedram/common.py | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/litedram/common.py b/litedram/common.py
index 4d0fc68..f835e0e 100644
--- a/litedram/common.py
+++ b/litedram/common.py
@@ -136,6 +136,15 @@ class BitSlip(Module):
             cases[i] = self.o.eq(r[i:dw+i])
         self.comb += Case(value, cases)
 
+# TappedDelayLine ----------------------------------------------------------------------------------
+
+class TappedDelayLine(Module):
+    def __init__(self, signal, ntaps):
+        self.taps = Array(signal if i == 0 else Signal.like(signal) for i in range(ntaps))
+        for i in range(1, ntaps):
+            self.sync += self.taps[i].eq(self.taps[i-1])
+        self.output = self.taps[-1]
+
 # DQS Pattern --------------------------------------------------------------------------------------
 
 class DQSPattern(Module):