From d647abd026bde3120cc64f2e5a2f275211b7458f Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Mon, 23 Sep 2019 15:54:53 +0200 Subject: [PATCH] gen: fix with_wishbone --- litedram/gen.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/litedram/gen.py b/litedram/gen.py index cad9d2b..1a9e250 100644 --- a/litedram/gen.py +++ b/litedram/gen.py @@ -258,7 +258,7 @@ class LiteDRAMCore(SoCSDRAM): kwargs["with_uart"] = False kwargs["with_timer"] = False kwargs["with_ctrl"] = False - kwargs["with_wishbone"] = (cpu_type is None) + kwargs["with_wishbone"] = (cpu_type != None) else: kwargs["l2_size"] = 0 SoCSDRAM.__init__(self, platform, sys_clk_freq,