From e1defa26877c80465bfad8caa5343a5555f68157 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Thu, 7 Oct 2021 16:22:40 +0200 Subject: [PATCH] litedram_gen: Fix rate for 7-Series. --- litedram/gen.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/litedram/gen.py b/litedram/gen.py index b328f5d..5e63c60 100755 --- a/litedram/gen.py +++ b/litedram/gen.py @@ -535,7 +535,7 @@ class LiteDRAMCore(SoCCore): rate = {"DDR3": "1:2"}[core_config["memtype"]] elif core_config["sdram_phy"] in [litedram_phys.A7DDRPHY, litedram_phys.K7DDRPHY, litedram_phys.V7DDRPHY]: crg = LiteDRAMS7DDRPHYCRG(platform, core_config) - rate = {"DDR3": "1:4", "DDR4": "1:4"}[core_config["memtype"]] + rate = {"DDR2": "1:2", "DDR3": "1:4"}[core_config["memtype"]] elif core_config["sdram_phy"] in [litedram_phys.USDDRPHY]: crg = LiteDRAMUSDDRPHYCRG(platform, core_config) rate = {"DDR3": "1:4", "DDR4": "1:4"}[core_config["memtype"]]