From e3c2ab075785c5a979268e573f5bb5b94582b1c4 Mon Sep 17 00:00:00 2001
From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Thu, 4 Mar 2021 14:44:07 +0100
Subject: [PATCH] phy/usddrphy: Add missing i_RST on DQS's ODELAYE3.

---
 litedram/phy/usddrphy.py | 1 +
 1 file changed, 1 insertion(+)

diff --git a/litedram/phy/usddrphy.py b/litedram/phy/usddrphy.py
index 2fb434e..7a0351f 100644
--- a/litedram/phy/usddrphy.py
+++ b/litedram/phy/usddrphy.py
@@ -288,6 +288,7 @@ class USDDRPHY(Module, AutoCSR):
                         p_DELAY_TYPE       = "VARIABLE",
                         p_DELAY_VALUE      = int(tck*1e12/4),
                         o_CNTVALUEOUT      = self._half_sys8x_taps.status if (i == 0) and (j == 0) else Signal(),
+                        i_RST              = ResetSignal("ic"),
                         i_CLK              = ClockSignal(),
                         i_EN_VTC           = self._en_vtc.storage,
                         i_CE               = self._dly_sel.storage[i] & self._wdly_dqs_inc.re,