From e5179eb9abef55d5064b3dfda776fda72c6c175f Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?J=C4=99drzej=20Boczar?= <jboczar@antmicro.com>
Date: Wed, 3 Jun 2020 17:39:45 +0200
Subject: [PATCH] gen: fix LiteDRAMFIFO parameters

---
 litedram/gen.py | 2 --
 1 file changed, 2 deletions(-)

diff --git a/litedram/gen.py b/litedram/gen.py
index 2d4cf8f..fe1213e 100755
--- a/litedram/gen.py
+++ b/litedram/gen.py
@@ -609,9 +609,7 @@ class LiteDRAMCore(SoCCore):
                     base            = port["base"],
                     depth           = port["depth"],
                     write_port      = self.sdram.crossbar.get_port("write"),
-                    write_threshold = port["depth"] - 32, # FIXME
                     read_port       = self.sdram.crossbar.get_port("read"),
-                    read_threshold  = 32 # FIXME
                 )
                 self.submodules += fifo
                 self.comb += [