From e5e4f528d42ba4adff4d09558bbe210aedab7e5a Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Mon, 27 Jan 2020 18:30:24 +0100 Subject: [PATCH] examples/versa_ecp5.yml: enable CPU (required for DDR3 calibration), update copyright --- examples/versa_ecp5.yml | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/examples/versa_ecp5.yml b/examples/versa_ecp5.yml index 140e2d2..51809c4 100644 --- a/examples/versa_ecp5.yml +++ b/examples/versa_ecp5.yml @@ -1,10 +1,10 @@ -# This file is Copyright (c) 2018-2019 Florent Kermarrec +# This file is Copyright (c) 2020 Stefan Schrijvers # License: BSD { # General ------------------------------------------------------------------ - "cpu": None, # Type of CPU used for init/calib (vexriscv, lm32) - "memtype": "DDR3", # DRAM type + "cpu": "vexriscv", # Type of CPU used for init/calib (vexriscv, lm32) + "memtype": "DDR3", # DRAM type # PHY ---------------------------------------------------------------------- "sdram_module": "MT41K64M16", # SDRAM modules of the board or SO-DIMM