From ec9ad2fc3905e9dae86b5f3c2bf243dd5ee5087f Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Wed, 31 Jan 2018 09:32:21 +0100 Subject: [PATCH] frontend/dma: add description of fifo_buffered parameter --- litedram/frontend/dma.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/litedram/frontend/dma.py b/litedram/frontend/dma.py index 0a4b522..f0c2111 100644 --- a/litedram/frontend/dma.py +++ b/litedram/frontend/dma.py @@ -21,7 +21,7 @@ class LiteDRAMDMAReader(Module): read requests can be outstanding at once). fifo_buffered : bool - ??? + Implement FIFO in Block Ram. Attributes ---------- @@ -88,7 +88,7 @@ class LiteDRAMDMAWriter(Module): requests can be outstanding at once). fifo_buffered : bool - ??? + Implement FIFO in Block Ram. Attributes ----------