diff --git a/litedram/frontend/wishbone.py b/litedram/frontend/wishbone.py
index 76cc57a..5700ac2 100644
--- a/litedram/frontend/wishbone.py
+++ b/litedram/frontend/wishbone.py
@@ -26,7 +26,7 @@ class LiteDRAMWishbone2Native(LiteXModule):
         port_data_width     = 2**int(log2(len(port.wdata.data))) # Round to lowest power 2
         ratio               = wishbone_data_width/port_data_width
 
-        assert wishbone.addressing == "byte"
+        assert wishbone.addressing == "word"
 
         if wishbone_data_width != port_data_width:
             if wishbone_data_width > port_data_width: