From f51052f8b737156d1e257eff7cd3259cb56d0d1b Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Sat, 18 Jul 2020 23:06:11 +0200 Subject: [PATCH] core/controller: fix burst_length regression introduced by #206. --- litedram/core/controller.py | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/litedram/core/controller.py b/litedram/core/controller.py index e4b18d7..2f043f5 100644 --- a/litedram/core/controller.py +++ b/litedram/core/controller.py @@ -45,7 +45,10 @@ class ControllerSettings(Settings): class LiteDRAMController(Module): def __init__(self, phy_settings, geom_settings, timing_settings, clk_freq, controller_settings=ControllerSettings()): - burst_length = phy_settings.nphases * (1 if phy_settings.memtype == "SDR" else 2) + if phy_settings.memtype == "SDR": + burst_length = phy_settings.nphases + else: + burst_length = burst_lengths[phy_settings.memtype] address_align = log2_int(burst_length) # Settings ---------------------------------------------------------------------------------