Florent Kermarrec
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39c0b0356c
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bench/uartbone: Update with LiteX change.
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2023-07-20 15:44:18 +02:00 |
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Florent Kermarrec
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745f2a060a
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bench/targets: Use full imports.
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2022-05-02 13:07:29 +02:00 |
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Florent Kermarrec
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5f722a1513
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bench/test: Avoid use of ident_version (should fix CI).
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2022-02-15 17:33:31 +01:00 |
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Florent Kermarrec
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e90aa5a4d5
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bench/targets: Minor CRG cleanups.
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2021-06-29 12:36:02 +02:00 |
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Florent Kermarrec
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6256031d51
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bench: Update build directories and add rst in CRG (triggered on CPU reboot).
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2021-04-22 14:57:13 +02:00 |
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Florent Kermarrec
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c2a779df46
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bench: Update test targets (add_csr no longer required).
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2021-04-19 13:40:17 +02:00 |
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Florent Kermarrec
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5cd192a708
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bench: Remove soc_sdram import (No longer useful and deprecated).
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2021-03-30 08:49:54 +02:00 |
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Florent Kermarrec
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df5f555842
|
bench: Update with recent changes.
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2021-03-12 10:25:11 +01:00 |
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Florent Kermarrec
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c29c898af4
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platforms/targets: switch to LiteX-Boards.
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2021-01-04 14:11:32 +01:00 |
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Florent Kermarrec
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a87c468afa
|
bench: use --sys-clk-freq=xy to reconfigure frequency and fix Ultrascale.
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2020-12-10 19:06:19 +01:00 |
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Florent Kermarrec
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75f87538a5
|
bench: use common load_bios function.
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2020-12-10 11:21:21 +01:00 |
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Florent Kermarrec
|
ea63480253
|
bench/targets: add identifier.
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2020-12-10 11:12:45 +01:00 |
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Florent Kermarrec
|
c472499131
|
bench/targets: add optional analyzer on all test targets.
|
2020-12-10 08:44:35 +01:00 |
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Florent Kermarrec
|
5cfdf77654
|
bench/targets: simplify BIST integration using new add_sdram with_bist parameter.
|
2020-11-06 10:34:26 +01:00 |
|
Florent Kermarrec
|
256cc1b78b
|
bench/genesys2: add optional BIST.
|
2020-10-29 15:12:17 +01:00 |
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Florent Kermarrec
|
b24943e691
|
bench/genesys2: add litescope on ddrphy.dfi.
|
2020-10-08 16:21:02 +02:00 |
|
Florent Kermarrec
|
06544c6547
|
bench: uniformize targets with 125MHz clock and Etherbone.
|
2020-09-24 13:03:07 +02:00 |
|
Florent Kermarrec
|
6fc6174c38
|
bench/genesys2: expose uart parameter.
|
2020-09-17 08:22:17 +02:00 |
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Florent Kermarrec
|
6a5f2fdb09
|
bench/genesys2: add uart_name parameter.
Useful when Etherbone is just used to reload BIOS.
|
2020-09-14 18:43:33 +02:00 |
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Florent Kermarrec
|
020cff1970
|
bench/genesys2: add back Etherbone (faster for BIOS dev) and add --load-bios/set-sys_clk arguments.
|
2020-09-14 10:55:16 +02:00 |
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Florent Kermarrec
|
7eeea34c4e
|
bench: use 115200bauds UART on all targets (fast enough and simplify switch betwen targets).
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2020-09-14 10:05:55 +02:00 |
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Florent Kermarrec
|
7d0dac78c5
|
bench/kcu105: add a second pll to reduce frequency steps.
|
2020-08-28 19:03:44 +02:00 |
|
Florent Kermarrec
|
1fb78fa558
|
bench: cleanup, do more testing on 7-series.
|
2020-08-28 17:57:59 +02:00 |
|
Florent Kermarrec
|
248c5de517
|
bench: switch to UARTBone to simplify (and to allow testing boards without ethernet capability) and improve test.
|
2020-08-28 03:47:49 +02:00 |
|
Florent Kermarrec
|
d3502e6a9b
|
bench: add common.py with common bench test code.
|
2020-08-27 19:05:05 +02:00 |
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Florent Kermarrec
|
2e3e19e9d4
|
bench: simplify/improve, working on arty/genesys2.
|
2020-08-27 18:41:54 +02:00 |
|
Florent Kermarrec
|
9995c0fefb
|
bench: switch integrated_rom to "rw" mode and reload it over Etherbone at startup.
This simplifies software development.
|
2020-08-24 18:40:54 +02:00 |
|
Florent Kermarrec
|
ac825e5112
|
add SPDX License identifier to header and specify file is part of LiteDRAM.
|
2020-08-23 15:52:08 +02:00 |
|
Florent Kermarrec
|
94241d0583
|
bench: use new platform.request_all on LedChaser.
|
2020-08-06 20:03:03 +02:00 |
|
Florent Kermarrec
|
74205979bd
|
bench: add genesys2 bench.
|
2020-08-06 19:19:45 +02:00 |