Florent Kermarrec
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136be83749
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frontend/fifo: Revisit DRAM state to avoid deadlock situations when port_data_width != port_address_width.
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2021-10-06 18:05:48 +02:00 |
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Florent Kermarrec
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3d3bf623aa
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frontend/fifo: Simplify, fix corner cases.
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2021-09-23 23:22:51 +02:00 |
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Florent Kermarrec
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dd24073633
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test/test_fifo: Use 4 x DRAM data-width in Bypass mode to use Pre/Post-Converter.
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2021-09-23 18:57:00 +02:00 |
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Florent Kermarrec
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2d4a47f260
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frontend/fifo: Add initial optional/automatic Bypass implementation to LiteDRAMFIFO.
Bypass will provide lower latency and configurable data-width.
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2021-09-21 19:23:36 +02:00 |
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Florent Kermarrec
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ac825e5112
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add SPDX License identifier to header and specify file is part of LiteDRAM.
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2020-08-23 15:52:08 +02:00 |
Jędrzej Boczar
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8fedc3fcd2
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frontend/fifo: increase FIFO level after data has actually been written
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2020-06-03 16:13:28 +02:00 |
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Florent Kermarrec
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02fd39cf70
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test/test_fifo: add comments.
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2020-04-14 21:40:51 +02:00 |
|
Florent Kermarrec
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966ebcbc41
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test: cleanup/uniformize things between tests.
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2020-04-13 19:38:29 +02:00 |
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Florent Kermarrec
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6951428af5
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test/test_fifo: minor cleanup.
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2020-03-26 12:23:25 +01:00 |
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Jędrzej Boczar
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4fd6dc0ab6
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test: split test_fifo_ctrl into 2 separate tests
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2020-03-25 11:50:13 +01:00 |
|
Jędrzej Boczar
|
5d5bff3425
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test: add frontend.fifo tests
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2020-03-25 11:50:13 +01:00 |
|
Florent Kermarrec
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1d2bc922b8
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frontend/fifo: get back to original simple design and add test
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2020-01-07 15:40:09 +01:00 |