55 lines
2.4 KiB
Python
55 lines
2.4 KiB
Python
#
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# This file is part of LiteDRAM.
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#
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# Copyright (c) 2019 Florent Kermarrec <florent@enjoy-digital.fr>
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# SPDX-License-Identifier: BSD-2-Clause
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import os
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import difflib
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import unittest
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from litedram.init import get_sdram_phy_c_header, get_sdram_phy_py_header
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def compare_with_reference(test_case, content, filename):
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ref_filename = os.path.join("test", "reference", filename)
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with open(ref_filename, "r") as f:
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reference = f.read().split("\n")
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content = content.split("\n")
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diff = list(difflib.unified_diff(content, reference, fromfile=filename, tofile=ref_filename))
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msg = "Unified diff:\n" + "\n".join(diff)
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test_case.assertEqual(len(diff), 0, msg=msg)
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def update_c_reference(content, filename):
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f = open(os.path.join("test", "reference", filename), "w")
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f.write(content)
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f.close()
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class TestInit(unittest.TestCase):
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def test_sdr(self):
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from litex_boards.targets.scarabhardware_minispartan6 import BaseSoC
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soc = BaseSoC()
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c_header = get_sdram_phy_c_header(soc.sdram.controller.settings.phy, soc.sdram.controller.settings.timing)
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py_header = get_sdram_phy_py_header(soc.sdram.controller.settings.phy, soc.sdram.controller.settings.timing)
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#update_c_reference(c_header, "sdr_init.h")
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compare_with_reference(self, c_header, "sdr_init.h")
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compare_with_reference(self, py_header, "sdr_init.py")
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def test_ddr3(self):
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from litex_boards.targets.xilinx_kc705 import BaseSoC
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soc = BaseSoC()
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c_header = get_sdram_phy_c_header(soc.sdram.controller.settings.phy, soc.sdram.controller.settings.timing)
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py_header = get_sdram_phy_py_header(soc.sdram.controller.settings.phy, soc.sdram.controller.settings.timing)
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#update_c_reference(c_header, "ddr3_init.h")
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compare_with_reference(self, c_header, "ddr3_init.h")
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compare_with_reference(self, py_header, "ddr3_init.py")
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def test_ddr4(self):
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from litex_boards.targets.xilinx_kcu105 import BaseSoC
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soc = BaseSoC(max_sdram_size=0x4000000)
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c_header = get_sdram_phy_c_header(soc.sdram.controller.settings.phy, soc.sdram.controller.settings.timing)
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py_header = get_sdram_phy_py_header(soc.sdram.controller.settings.phy, soc.sdram.controller.settings.timing)
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#update_c_reference(c_header, "ddr4_init.h")
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compare_with_reference(self, c_header, "ddr4_init.h")
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compare_with_reference(self, py_header, "ddr4_init.py")
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