litedram/.travis.yml

61 lines
1.9 KiB
YAML

language: python
dist: bionic
python: "3.6"
before_install:
- sudo apt-get update
- sudo apt-get -y install verilator libevent-dev libjson-c-dev
- pip install pexpect
install:
# Get Migen / LiteX / Cores
- wget https://raw.githubusercontent.com/enjoy-digital/litex/master/litex_setup.py
- python3 litex_setup.py init install
before_script:
# Get RISC-V toolchain
- wget https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-20171231-x86_64-linux-centos6.tar.gz
- tar -xvf riscv64-unknown-elf-gcc-20171231-x86_64-linux-centos6.tar.gz
- export PATH=$PATH:$PWD/riscv64-unknown-elf-gcc-20171231-x86_64-linux-centos6/bin/
script: ./.sim-test.py --sdram-module="$SDRAM_MODULE"
jobs:
include:
- stage: "Unit tests"
script: python setup.py test
- stage: "Simulations"
env: SDRAM_MODULE=IS42S16160
- env: SDRAM_MODULE=IS42S16320
- env: SDRAM_MODULE=MT48LC4M16
- env: SDRAM_MODULE=MT48LC16M16
- env: SDRAM_MODULE=AS4C16M16
- env: SDRAM_MODULE=AS4C32M16
- env: SDRAM_MODULE=AS4C32M8
- env: SDRAM_MODULE=M12L64322A
- env: SDRAM_MODULE=M12L16161A
- env: SDRAM_MODULE=MT46V32M16
- env: SDRAM_MODULE=MT46H32M16
- env: SDRAM_MODULE=MT46H32M32
- env: SDRAM_MODULE=MT47H128M8
- env: SDRAM_MODULE=MT47H32M16
- env: SDRAM_MODULE=MT47H64M16
- env: SDRAM_MODULE=P3R1GE4JGF
- env: SDRAM_MODULE=MT41K64M16
- env: SDRAM_MODULE=MT41J128M16
- env: SDRAM_MODULE=MT41J256M16
- env: SDRAM_MODULE=K4B1G0446F
- env: SDRAM_MODULE=K4B2G1646F
- env: SDRAM_MODULE=H5TC4G63CFR
- env: SDRAM_MODULE=IS43TR16128B
- env: SDRAM_MODULE=MT8JTF12864
- env: SDRAM_MODULE=MT8KTF51264
- env: SDRAM_MODULE=MT18KSF1G72HZ
- env: SDRAM_MODULE=AS4C256M16D3A
- env: SDRAM_MODULE=MT16KTF1G64HZ
- env: SDRAM_MODULE=EDY4016A
- env: SDRAM_MODULE=MT40A1G8
- env: SDRAM_MODULE=MT40A512M16