2015-09-07 19:43:09 -04:00
|
|
|
#!/usr/bin/env python3
|
|
|
|
|
|
|
|
from setuptools import setup
|
|
|
|
from setuptools import find_packages
|
|
|
|
|
|
|
|
|
2023-04-11 14:05:08 -04:00
|
|
|
with open("README.md", "r") as fp:
|
|
|
|
long_description = fp.read()
|
|
|
|
|
|
|
|
|
2015-09-07 19:43:09 -04:00
|
|
|
setup(
|
2018-01-12 21:23:18 -05:00
|
|
|
name="liteeth",
|
2023-09-18 02:42:17 -04:00
|
|
|
version="2023.08",
|
2018-02-22 04:12:33 -05:00
|
|
|
description="Small footprint and configurable Ethernet core",
|
2023-04-11 14:05:08 -04:00
|
|
|
long_description=long_description,
|
|
|
|
long_description_content_type="text/markdown",
|
2018-01-12 21:23:18 -05:00
|
|
|
author="Florent Kermarrec",
|
|
|
|
author_email="florent@enjoy-digital.fr",
|
|
|
|
url="http://enjoy-digital.fr",
|
|
|
|
download_url="https://github.com/enjoy-digital/liteeth",
|
2017-01-19 08:33:24 -05:00
|
|
|
test_suite="test",
|
2015-11-14 11:28:40 -05:00
|
|
|
license="BSD",
|
2020-04-07 05:54:31 -04:00
|
|
|
python_requires="~=3.6",
|
2023-04-11 14:05:08 -04:00
|
|
|
install_requires=["pyyaml", "litex", "liteiclink"],
|
|
|
|
extras_require={
|
|
|
|
"develop": [
|
|
|
|
"setuptools"
|
|
|
|
]
|
|
|
|
},
|
2018-08-31 02:26:37 -04:00
|
|
|
packages=find_packages(exclude=("test*", "sim*", "doc*", "examples*")),
|
2015-11-14 11:28:40 -05:00
|
|
|
include_package_data=True,
|
2023-04-11 14:05:08 -04:00
|
|
|
keywords="HDL ASIC FPGA hardware design",
|
|
|
|
classifiers=[
|
|
|
|
"Topic :: Scientific/Engineering :: Electronic Design Automation (EDA)",
|
|
|
|
"Environment :: Console",
|
|
|
|
"Development Status :: 3 - Alpha",
|
|
|
|
"Intended Audience :: Developers",
|
|
|
|
"License :: OSI Approved :: BSD License",
|
|
|
|
"Operating System :: OS Independent",
|
|
|
|
"Programming Language :: Python",
|
|
|
|
],
|
2019-11-24 04:59:52 -05:00
|
|
|
entry_points={
|
|
|
|
"console_scripts": [
|
|
|
|
"liteeth_gen=liteeth.gen:main",
|
|
|
|
],
|
|
|
|
},
|
2015-09-07 19:43:09 -04:00
|
|
|
)
|