liteeth/examples/udp_a7_gtp_sgmii.yml

#
# This file is part of LiteEth.
#
# Copyright (c) 2020-2024 Florent Kermarrec <florent@enjoy-digital.fr>
# SPDX-License-Identifier: BSD-2-Clause

# PHY ----------------------------------------------------------------------
phy             : A7_1000BASEX
phy_tx_polarity : 0
phy_rx_polarity : 0
vendor          : xilinx
toolchain       : vivado

# Core ---------------------------------------------------------------------
refclk_freq : 156.25e6
clk_freq    : 25e6
core        : udp
data_width  : 32
dhcp        : True

# UDP Ports --------------------------------------------------------------------
udp_ports:   {
  "udp0": {
    "data_width"    : 32,
    "tx_fifo_depth" : 1024,
    "rx_fifo_depth" : 1024,
  },
}