diff --git a/examples/targets/stream.py b/examples/targets/stream.py new file mode 100644 index 0000000..25091ba --- /dev/null +++ b/examples/targets/stream.py @@ -0,0 +1,38 @@ +# This file is Copyright (c) 2015-2019 Florent Kermarrec +# License: BSD + +from liteeth.common import * +from liteeth.frontend.stream import LiteEthUDPStreamer + +from targets.base import BaseSoC + +# StreamSoC ---------------------------------------------------------------------------------------- + +class StreamSoC(BaseSoC): + default_platform = "kc705" + def __init__(self, platform): + BaseSoC.__init__(self, platform, + mac_address = 0x10e2d5000000, + ip_address = "192.168.1.50") + self.submodules.streamer = LiteEthUDPStreamer(self.ethcore.udp, convert_ip("192.168.1.100"), 10000) + self.comb += self.streamer.source.connect(self.streamer.sink) + +# StreamSoDevel ------------------------------------------------------------------------------------ + +class StreamSoCDevel(StreamSoC): + def __init__(self, platform): + from litescope import LiteScopeAnalyzer + StreamSoC.__init__(self, platform) + analyzer_signals = [ + self.streamer.sink.valid, + self.streamer.sink.ready, + self.streamer.sink.data, + + self.streamer.source.valid, + self.streamer.source.ready, + self.streamer.source.data + ] + self.submodules.analyzer = LiteScopeAnalyzer(analyzer_signals, 4096, csr_csv="test/analyzer.csv") + self.add_csr("analyzer") + +default_subtarget = StreamSoC diff --git a/examples/targets/tty.py b/examples/targets/tty.py deleted file mode 100644 index 6b68db9..0000000 --- a/examples/targets/tty.py +++ /dev/null @@ -1,38 +0,0 @@ -# This file is Copyright (c) 2015-2019 Florent Kermarrec -# License: BSD - -from liteeth.common import * -from liteeth.frontend.tty import LiteEthTTY - -from targets.base import BaseSoC - -# TTYSoC ------------------------------------------------------------------------------------------- - -class TTYSoC(BaseSoC): - default_platform = "kc705" - def __init__(self, platform): - BaseSoC.__init__(self, platform, - mac_address=0x10e2d5000000, - ip_address="192.168.1.50") - self.submodules.tty = LiteEthTTY(self.ethcore.udp, convert_ip("192.168.1.100"), 10000) - self.comb += self.tty.source.connect(self.tty.sink) - -# TTYSoDevel --------------------------------------------------------------------------------------- - -class TTYSoCDevel(TTYSoC): - def __init__(self, platform): - from litescope import LiteScopeAnalyzer - TTYSoC.__init__(self, platform) - analyzer_signals = [ - self.tty.sink.valid, - self.tty.sink.ready, - self.tty.sink.data, - - self.tty.source.valid, - self.tty.source.ready, - self.tty.source.data - ] - self.submodules.analyzer = LiteScopeAnalyzer(analyzer_signals, 4096, csr_csv="test/analyzer.csv") - self.add_csr("analyzer") - -default_subtarget = TTYSoC diff --git a/examples/test/test_tty.py b/examples/test/test_stream.py similarity index 88% rename from examples/test/test_tty.py rename to examples/test/test_stream.py index 95be49a..6059485 100644 --- a/examples/test/test_tty.py +++ b/examples/test/test_stream.py @@ -7,7 +7,7 @@ import threading def test(fpga_ip, udp_port, test_message): tx_sock = socket.socket(socket.AF_INET, socket.SOCK_DGRAM) - rx_sock = socket.socket(socket.AF_INET, socket.SOCK_DGRAM) + rx_sock = socket.socket(socket.AF_INET, socket.SOCK_DGRAM) rx_sock.bind(("", udp_port)) rx_sock.settimeout(0.5) @@ -38,7 +38,7 @@ def test(fpga_ip, udp_port, test_message): # # # -test_message = "LiteEth virtual TTY Hello world\n" +test_message = "LiteEth Stream Hello world\n" test("192.168.1.50", 10000, test_message) # # # \ No newline at end of file diff --git a/liteeth/frontend/tty.py b/liteeth/frontend/stream.py similarity index 81% rename from liteeth/frontend/tty.py rename to liteeth/frontend/stream.py index 8847b31..3dde398 100644 --- a/liteeth/frontend/tty.py +++ b/liteeth/frontend/stream.py @@ -3,11 +3,11 @@ from liteeth.common import * -# TTY TX ------------------------------------------------------------------------------------------- +# Steam 2 UDP TX ----------------------------------------------------------------------------------- -class LiteEthTTYTX(Module): +class LiteEthStream2UDPTX(Module): def __init__(self, ip_address, udp_port, fifo_depth=None): - self.sink = sink = stream.Endpoint(eth_tty_description(8)) + self.sink = sink = stream.Endpoint(eth_tty_description(8)) self.source = source = stream.Endpoint(eth_udp_user_description(8)) # # # @@ -60,11 +60,11 @@ class LiteEthTTYTX(Module): ) ) -# TTY RX ------------------------------------------------------------------------------------------- +# UDP to Stream RX --------------------------------------------------------------------------------- -class LiteEthTTYRX(Module): +class LiteEthUDP2StreamRX(Module): def __init__(self, ip_address, udp_port, fifo_depth=None): - self.sink = sink = stream.Endpoint(eth_udp_user_description(8)) + self.sink = sink = stream.Endpoint(eth_udp_user_description(8)) self.source = source = stream.Endpoint(eth_tty_description(8)) # # # @@ -89,14 +89,12 @@ class LiteEthTTYRX(Module): fifo.source.connect(source) ] -# TTY ---------------------------------------------------------------------------------------------- +# UDP Streamer ------------------------------------------------------------------------------------- -class LiteEthTTY(Module): - def __init__(self, udp, ip_address, udp_port, - rx_fifo_depth=64, - tx_fifo_depth=64): - self.submodules.tx = tx = LiteEthTTYTX(ip_address, udp_port, tx_fifo_depth) - self.submodules.rx = rx = LiteEthTTYRX(ip_address, udp_port, rx_fifo_depth) +class LiteEthUDPStreamer(Module): + def __init__(self, udp, ip_address, udp_port, rx_fifo_depth=64, tx_fifo_depth=64): + self.submodules.tx = tx = LiteEthStream2UDPTX(ip_address, udp_port, tx_fifo_depth) + self.submodules.rx = rx = LiteEthUDP2StreamRX(ip_address, udp_port, rx_fifo_depth) udp_port = udp.crossbar.get_port(udp_port, dw=8) self.comb += [ tx.source.connect(udp_port.sink), diff --git a/test/test_examples.py b/test/test_examples.py index 4c0d4f6..c536778 100644 --- a/test/test_examples.py +++ b/test/test_examples.py @@ -31,6 +31,6 @@ class TestExamples(unittest.TestCase): self.example_test("etherbone", "EtherboneSoC") self.example_test("etherbone", "EtherboneSoCDevel") - def test_tty_example(self): - self.example_test("tty", "TTYSoC") - self.example_test("tty", "TTYSoCDevel") + def test_stream_example(self): + self.example_test("stream", "StreamSoC") + self.example_test("stream", "StreamSoCDevel")