liteeth/mac/core: Allow PHY to enforce with_preamble_crc/with_padding parameters.

Avoid exposing these parameters up to add_ethernet since appropriate behaviour is generally
directly related to the type of PHY (ex LiteEthPHYModel or custom/specialized PHY).
This commit is contained in:
Florent Kermarrec 2024-09-23 16:35:28 +02:00
parent 1d19de09ef
commit 2b0156e9b3
2 changed files with 8 additions and 4 deletions

View File

@ -10,7 +10,6 @@
from liteeth.common import * from liteeth.common import *
from liteeth.mac import gap, preamble, crc, padding, last_be from liteeth.mac import gap, preamble, crc, padding, last_be
from liteeth.phy.model import LiteEthPHYModel
from migen.genlib.cdc import PulseSynchronizer from migen.genlib.cdc import PulseSynchronizer
@ -46,8 +45,12 @@ class LiteEthMACCore(Module, AutoCSR):
cd_tx = "eth_tx" cd_tx = "eth_tx"
cd_rx = "eth_rx" cd_rx = "eth_rx"
datapath_dw = phy_dw datapath_dw = phy_dw
if isinstance(phy, LiteEthPHYModel):
with_preamble_crc = False # Disable Preamble/CRC with PHY Model for direct connection to the Ethernet tap. # If the PHY specifies preamble, CRC, or padding behavior, use it.
if hasattr(phy, "with_preamble_crc"):
with_preamble_crc = phy.with_preamble_crc
if hasattr(phy, "with_padding"):
with_padding = phy.with_padding
# CSRs. # CSRs.
if with_preamble_crc: if with_preamble_crc:

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@ -34,7 +34,8 @@ class LiteEthPHYModelCRG(LiteXModule):
# LiteEth PHY Model -------------------------------------------------------------------------------- # LiteEth PHY Model --------------------------------------------------------------------------------
class LiteEthPHYModel(LiteXModule): class LiteEthPHYModel(LiteXModule):
dw = 8 dw = 8
with_preamble_crc = False # Disable Preamble/CRC with for direct connection to the Ethernet tap.
def __init__(self, pads): def __init__(self, pads):
self.crg = LiteEthPHYModelCRG() self.crg = LiteEthPHYModelCRG()
self.sink = sink = stream.Endpoint(eth_phy_description(8)) self.sink = sink = stream.Endpoint(eth_phy_description(8))