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examples: Improve identation/presentation.

This commit is contained in:
Florent Kermarrec 2024-03-18 13:43:11 +01:00
parent e3a5d6fc19
commit 2c67d13456
6 changed files with 67 additions and 58 deletions
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2
examples/axi-lite-mii.yml
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@ -9,11 +9,13 @@
phy : LiteEthPHYMII
vendor : xilinx
toolchain : vivado
# Core ---------------------------------------------------------------------
clk_freq : 100e6
core : axi-lite
endianness : big
# SoC ---------------------------------------------------------------------
soc:
mem_map:
ethmac: 0x50000000

4
examples/udp_a7_gtp_sgmii.yml
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@ -4,14 +4,14 @@
# Copyright (c) 2020-2024 Florent Kermarrec <florent@enjoy-digital.fr>
# SPDX-License-Identifier: BSD-2-Clause
# PHY ----------------------------------------------------------------------
# PHY --------------------------------------------------------------------------
phy : A7_1000BASEX
phy_tx_polarity : 0
phy_rx_polarity : 0
vendor : xilinx
toolchain : vivado
# Core ---------------------------------------------------------------------
# Core -------------------------------------------------------------------------
refclk_freq : 156.25e6
clk_freq : 25e6
core : udp

9
examples/udp_raw_ecp5rgmii.yml
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@ -1,13 +1,17 @@
--- # PHY ----------------------------------------------------------------------
#
# This file is part of LiteEth.
#
# Copyright (c) 2023 LumiGuide Fietsdetectie B.V. <goemansrowan@gmail.com>
# License: BSD
# SPDX-License-Identifier: BSD-2-Clause
# PHY --------------------------------------------------------------------------
phy : LiteEthECP5PHYRGMII
phy_tx_delay : 0e-9
phy_rx_delay : 2e-9
device : LFE5U-25F-6BG256C
vendor : lattice
toolchain : trellis
# Core -------------------------------------------------------------------------
clk_freq : 125e6
core : udp
@ -19,6 +23,7 @@ tx_cdc_depth: 16
tx_cdc_buffered : True
rx_cdc_depth : 16
rx_cdc_buffered : True
# UDP Ports --------------------------------------------------------------------
# mode `raw` vs `streamer` mode:
# The streamer mode is a convenience wrapper around a `raw` UDP port. A raw UDP

4
examples/udp_usp_gth_sgmii.yml
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@ -4,12 +4,12 @@
# Copyright (c) 2020-2023 Florent Kermarrec <florent@enjoy-digital.fr>
# SPDX-License-Identifier: BSD-2-Clause
# PHY ----------------------------------------------------------------------
# PHY --------------------------------------------------------------------------
phy : USP_GTH_1000BASEX
vendor : xilinx
toolchain : vivado
# Core ---------------------------------------------------------------------
# Core -------------------------------------------------------------------------
refclk_freq : 156.25e6
clk_freq : 25e6
core : udp

6
examples/wishbone_mii.yml
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@ -4,15 +4,17 @@
# Copyright (c) 2020 Florent Kermarrec <florent@enjoy-digital.fr>
# SPDX-License-Identifier: BSD-2-Clause
# PHY ----------------------------------------------------------------------
# PHY --------------------------------------------------------------------------
phy : LiteEthPHYMII
vendor : xilinx
toolchain : vivado
# Core ---------------------------------------------------------------------
# Core -------------------------------------------------------------------------
clk_freq : 100e6
core : wishbone
endianness : big
# SoC --------------------------------------------------------------------------
soc:
mem_map:
ethmac: 0x50000000