From 4af0c773711e9c4fd5759449b0bb77f11fedc37d Mon Sep 17 00:00:00 2001
From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Mon, 25 Mar 2024 16:00:39 +0100
Subject: [PATCH] phy/a7_1000basex: Switch txoutclk buffer to BUFG.

---
 liteeth/phy/a7_1000basex.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/liteeth/phy/a7_1000basex.py b/liteeth/phy/a7_1000basex.py
index e14721e..14d8471 100644
--- a/liteeth/phy/a7_1000basex.py
+++ b/liteeth/phy/a7_1000basex.py
@@ -702,7 +702,7 @@ class A7_1000BASEX(LiteXModule):
 
         # Get 125MHz clocks back - the GTP is outputting 62.5MHz.
         txoutclk_rebuffer = Signal()
-        self.specials += Instance("BUFH",
+        self.specials += Instance("BUFG",
             i_I = self.txoutclk,
             o_O = txoutclk_rebuffer
         )