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bench/targets: set buffer_depth to 255 (max).

This commit is contained in:
Florent Kermarrec 2020-11-25 15:13:55 +01:00
parent c3e1dad289
commit 5abf44d89a
3 changed files with 3 additions and 3 deletions
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2
bench/arty.py
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@ -42,7 +42,7 @@ class BenchSoC(SoCCore):
pads = self.platform.request("eth"), pads = self.platform.request("eth"),
with_hw_init_reset = False) with_hw_init_reset = False)
self.add_csr("ethphy") self.add_csr("ethphy")
self.add_etherbone(phy=self.ethphy, buffer_depth=128) self.add_etherbone(phy=self.ethphy, buffer_depth=255)
# SRAM ------------------------------------------------------------------------------------- # SRAM -------------------------------------------------------------------------------------
self.add_ram("sram", 0x20000000, 0x1000) self.add_ram("sram", 0x20000000, 0x1000)

2
bench/colorlight_5a_75b.py
View File

@ -43,7 +43,7 @@ class BenchSoC(SoCCore):
tx_delay = 0e-9, tx_delay = 0e-9,
with_hw_init_reset = False) with_hw_init_reset = False)
self.add_csr("ethphy") self.add_csr("ethphy")
self.add_etherbone(phy=self.ethphy, buffer_depth=128) self.add_etherbone(phy=self.ethphy, buffer_depth=255)
# SRAM ------------------------------------------------------------------------------------- # SRAM -------------------------------------------------------------------------------------
self.add_ram("sram", 0x20000000, 0x1000) self.add_ram("sram", 0x20000000, 0x1000)

2
bench/genesys2.py
View File

@ -42,7 +42,7 @@ class BenchSoC(SoCCore):
pads = self.platform.request("eth"), pads = self.platform.request("eth"),
with_hw_init_reset = False) with_hw_init_reset = False)
self.add_csr("ethphy") self.add_csr("ethphy")
self.add_etherbone(phy=self.ethphy, buffer_depth=128) self.add_etherbone(phy=self.ethphy, buffer_depth=255)
# SRAM ------------------------------------------------------------------------------------- # SRAM -------------------------------------------------------------------------------------
self.add_ram("sram", 0x20000000, 0x1000) self.add_ram("sram", 0x20000000, 0x1000)