From 5c806c150e486659c839ff17add6f68ae157e2c2 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Thu, 6 Jul 2023 19:24:12 +0200 Subject: [PATCH] core/LiteEthUDP/IPCore: Use buffered TX/RX CDC as default since improving timing on low-end FPGAs and not impacting much resources. --- liteeth/core/__init__.py | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/liteeth/core/__init__.py b/liteeth/core/__init__.py index f51ad11..4eca800 100644 --- a/liteeth/core/__init__.py +++ b/liteeth/core/__init__.py @@ -20,9 +20,9 @@ class LiteEthIPCore(Module, AutoCSR): with_ip_broadcast = True, with_sys_datapath = False, tx_cdc_depth = 32, - tx_cdc_buffered = False, + tx_cdc_buffered = True, rx_cdc_depth = 32, - rx_cdc_buffered = False, + rx_cdc_buffered = True, ): # Parameters. # ----------- @@ -79,9 +79,9 @@ class LiteEthUDPIPCore(LiteEthIPCore): with_ip_broadcast = True, with_sys_datapath = False, tx_cdc_depth = 32, - tx_cdc_buffered = False, + tx_cdc_buffered = True, rx_cdc_depth = 32, - rx_cdc_buffered = False, + rx_cdc_buffered = True, ): # Parameters. # -----------