Hardware
/
liteeth
mirror of https://github.com/enjoy-digital/liteeth.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

core/LiteEthUDP/IPCore: Use buffered TX/RX CDC as default since improving timing on low-end FPGAs and not impacting much resources.

This commit is contained in:
Florent Kermarrec 2023-07-06 19:24:12 +02:00
parent 70a89eafaa
commit 5c806c150e
1 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
liteeth/core/__init__.py
View File

@ -20,9 +20,9 @@ class LiteEthIPCore(Module, AutoCSR):
with_ip_broadcast = True,
with_sys_datapath = False,
tx_cdc_depth = 32,
tx_cdc_buffered = False,
tx_cdc_buffered = True,
rx_cdc_depth = 32,
rx_cdc_buffered = False,
rx_cdc_buffered = True,
):
# Parameters.
# -----------
@ -79,9 +79,9 @@ class LiteEthUDPIPCore(LiteEthIPCore):
with_ip_broadcast = True,
with_sys_datapath = False,
tx_cdc_depth = 32,
tx_cdc_buffered = False,
tx_cdc_buffered = True,
rx_cdc_depth = 32,
rx_cdc_buffered = False,
rx_cdc_buffered = True,
):
# Parameters.
# -----------