test: use passive generators and some cleanup

test/arp_tb.py

@@ -1,3 +1,4 @@
+#!/usr/bin/env python3
 from litex.gen import *
 
 from litex.soc.interconnect import wishbone
@@ -34,10 +35,6 @@ def main_generator(dut):
         yield
     print("Received MAC : 0x{:12x}".format((yield dut.arp.table.response.mac_address)))
 
-    # XXX: find a way to exit properly
-    import sys
-    sys.exit()
-
 if __name__ == "__main__":
     tb = TB()
     generators = {

test/etherbone_tb.py

@@ -1,3 +1,4 @@
+#!/usr/bin/env python3
 from litex.gen import *
 
 from litex.soc.interconnect import wishbone
@@ -96,10 +97,6 @@ def main_generator(dut):
             s, l, e = check(writes_datas, loopback_writes_datas)
             print("shift " + str(s) + " / length " + str(l) + " / errors " + str(e))
 
-    # XXX: find a way to exit properly
-    import sys
-    sys.exit()
-
 if __name__ == "__main__":
     tb = TB()
     generators = {

test/icmp_tb.py

@@ -1,3 +1,4 @@
+#!/usr/bin/env python3
 from litex.gen import *
 
 from litex.soc.interconnect import wishbone
@@ -38,10 +39,6 @@ def main_generator(dut):
     for i in range(256):
         yield
 
-    # XXX: find a way to exit properly
-    import sys
-    sys.exit()
-
 if __name__ == "__main__":
     tb = TB()
     generators = {

test/ip_tb.py

@@ -1,3 +1,4 @@
+#!/usr/bin/env python3
 from litex.gen import *
 
 from litex.soc.interconnect import wishbone
@@ -23,20 +24,15 @@ class TB(Module):
         self.ip_port = self.ip.ip.crossbar.get_port(udp_protocol)
 
 def main_generator(dut):
-    while True:
+    yield dut.ip_port.sink.valid.eq(1)
-        yield dut.ip_port.sink.valid.eq(1)
+    yield dut.ip_port.sink.last.eq(1)
-        yield dut.ip_port.sink.last.eq(1)
+    yield dut.ip_port.sink.ip_address.eq(0x12345678)
-        yield dut.ip_port.sink.ip_address.eq(0x12345678)
+    yield dut.ip_port.sink.protocol.eq(udp_protocol)
-        yield dut.ip_port.sink.protocol.eq(udp_protocol)
-
-        yield dut.ip_port.source.ready.eq(1)
-        if (yield dut.ip_port.source.valid) == 1 and (yield dut.ip_port.source.last) == 1:
-            print("packet from IP 0x{:08x}".format((yield dut.ip_port.sink.ip_address)))
-            # XXX: find a way to exit properly
-            import sys
-            sys.exit()
 
+    yield dut.ip_port.source.ready.eq(1)
+    while not ((yield dut.ip_port.source.valid) and (yield dut.ip_port.source.last)):
         yield
+    print("packet from IP 0x{:08x}".format((yield dut.ip_port.sink.ip_address)))
 
 if __name__ == "__main__":
     tb = TB()

test/mac_core_tb.py

@@ -1,3 +1,4 @@
+#!/usr/bin/env python3
 from litex.gen import *
 
 from litex.soc.interconnect import wishbone
@@ -16,9 +17,9 @@ class TB(Module):
         self.submodules.core = LiteEthMACCore(phy=self.phy_model, dw=8, with_preamble_crc=True)
 
         self.submodules.streamer = PacketStreamer(eth_phy_description(8), last_be=1)
-        self.submodules.streamer_randomizer = AckRandomizer(eth_phy_description(8), level=50)
+        self.submodules.streamer_randomizer = Randomizer(eth_phy_description(8), level=50)
 
-        self.submodules.logger_randomizer = AckRandomizer(eth_phy_description(8), level=50)
+        self.submodules.logger_randomizer = Randomizer(eth_phy_description(8), level=50)
         self.submodules.logger = PacketLogger(eth_phy_description(8))
 
         self.comb += [
@@ -43,10 +44,6 @@ def main_generator(dut):
         s, l, e = check(packet, dut.logger.packet)
         print("shift " + str(s) + " / length " + str(l) + " / errors " + str(e))
 
-    # XXX: find a way to exit properly
-    import sys
-    sys.exit()
-
 if __name__ == "__main__":
     tb = TB()
     generators = {

test/mac_wishbone_tb.py

@@ -1,3 +1,4 @@
+#!/usr/bin/env python3
 from litex.gen import *
 
 from litex.soc.interconnect import wishbone
@@ -111,9 +112,6 @@ def main_generator(dut):
                 dat = int.from_bytes(tx_payload[4*i:4*(i+1)], "big")
                 yield from wishbone_master.write(sram_reader_slots_offset[slot]+i, dat)
 
-        # XXX: find a way to exit properly
-        import sys
-        sys.exit()
 
 #            # send tx payload & wait
 #            yield from sram_reader_driver.start(slot, length)

test/model/phy.py

@@ -54,6 +54,7 @@ class PHY(Module):
             print_phy(r)
         self.packet = self.phy_sink.packet
 
+    @passive
     def generator(self):
         while True:
             yield from self.receive()

test/udp_tb.py

@@ -1,3 +1,4 @@
+#!/usr/bin/env python3
 from litex.gen import *
 
 from litex.soc.interconnect import wishbone
@@ -43,10 +44,6 @@ def main_generator(dut):
     s, l, e = check(packet, dut.logger.packet)
     print("shift " + str(s) + " / length " + str(l) + " / errors " + str(e))
 
-    # XXX: find a way to exit properly
-    import sys
-    sys.exit()
-
 if __name__ == "__main__":
     tb = TB(8)
     generators = {