liteeth/mac/wishbone: Fix write_only mode on RX.

2024-06-25 18:26:20 +02:00 · 2024-06-25 18:26:20 +02:00 · 80bded4ffc
parent ec05e9c35c
commit 80bded4ffc
1 changed files with 1 additions and 1 deletions
--- a/liteeth/mac/wishbone.py
+++ b/liteeth/mac/wishbone.py
@ -46,7 +46,7 @@ class LiteEthMACWishboneInterface(LiteXModule):
            mems       = self.sram.writer.mems,
            nslots     = nrxslots,
            read_only  = rxslots_read_only,
-            write_only = True,
+            write_only = False,
        )
        self._expose_wishbone_sram_interfaces(
            bus        = self.bus_tx,