usp_gth_1000basex: Working :), remove debug.

This commit is contained in:
Florent Kermarrec 2023-06-13 17:44:12 +02:00
parent cfe3201854
commit 9f69850697
2 changed files with 4 additions and 21 deletions

View File

@ -48,7 +48,7 @@ class _CRG(LiteXModule):
self.pll = pll = USMMCM(speedgrade=-1) self.pll = pll = USMMCM(speedgrade=-1)
pll.register_clkin(platform.request("clk100"), 100e6) pll.register_clkin(platform.request("clk100"), 100e6)
pll.create_clkout(self.cd_sys, sys_clk_freq) pll.create_clkout(self.cd_sys, sys_clk_freq)
pll.create_clkout(self.cd_eth, 200e6, buf=None) pll.create_clkout(self.cd_eth, 200e6)
# Bench SoC ---------------------------------------------------------------------------------------- # Bench SoC ----------------------------------------------------------------------------------------
@ -64,10 +64,10 @@ class BenchSoC(SoCCore):
) )
# CRG -------------------------------------------------------------------------------------- # CRG --------------------------------------------------------------------------------------
self.submodules.crg = _CRG(platform, sys_clk_freq) self.crg = _CRG(platform, sys_clk_freq)
# Etherbone -------------------------------------------------------------------------------- # Etherbone --------------------------------------------------------------------------------
self.submodules.ethphy = USP_GTH_1000BASEX(self.crg.cd_eth.clk, self.ethphy = USP_GTH_1000BASEX(self.crg.cd_eth.clk,
data_pads = self.platform.request("sfp", 0), data_pads = self.platform.request("sfp", 0),
sys_clk_freq = self.clk_freq) sys_clk_freq = self.clk_freq)
self.add_etherbone(phy=self.ethphy, buffer_depth=4) self.add_etherbone(phy=self.ethphy, buffer_depth=4)
@ -77,7 +77,7 @@ class BenchSoC(SoCCore):
# Leds ------------------------------------------------------------------------------------- # Leds -------------------------------------------------------------------------------------
from litex.soc.cores.led import LedChaser from litex.soc.cores.led import LedChaser
self.submodules.leds = LedChaser( self.leds = LedChaser(
pads = platform.request_all("user_led"), pads = platform.request_all("user_led"),
sys_clk_freq = sys_clk_freq sys_clk_freq = sys_clk_freq
) )

View File

@ -5,8 +5,6 @@
# Copyright (c) 2018 Sebastien Bourdeauducq <sb@m-labs.hk> # Copyright (c) 2018 Sebastien Bourdeauducq <sb@m-labs.hk>
# SPDX-License-Identifier: BSD-2-Clause # SPDX-License-Identifier: BSD-2-Clause
# Work-In-Progress...
from migen import * from migen import *
from migen.genlib.resetsync import AsyncResetSynchronizer from migen.genlib.resetsync import AsyncResetSynchronizer
from migen.genlib.cdc import PulseSynchronizer from migen.genlib.cdc import PulseSynchronizer
@ -941,18 +939,3 @@ class USP_GTH_1000BASEX(LiteXModule):
gearbox.tx_data.eq(pcs.tbi_tx), gearbox.tx_data.eq(pcs.tbi_tx),
pcs.tbi_rx.eq(gearbox.rx_data) pcs.tbi_rx.eq(gearbox.rx_data)
] ]
self.debug = [
gtpowergood,
pll_reset,
pll_locked,
tx_reset,
tx_data,
tx_reset_done,
rx_reset,
rx_data,
rx_reset_done,
self.sink,
self.source,
self.link_up
]