From b5d7ba1220855f4c4d3371107def7eaab66ff498 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Thu, 4 Apr 2024 17:52:43 +0200 Subject: [PATCH] core/udp: Revert TX/RX Buffer since not helping (at least for now). --- liteeth/core/udp.py | 14 +------------- liteeth/frontend/etherbone.py | 2 +- 2 files changed, 2 insertions(+), 14 deletions(-) diff --git a/liteeth/core/udp.py b/liteeth/core/udp.py index 81a07ed..463343e 100644 --- a/liteeth/core/udp.py +++ b/liteeth/core/udp.py @@ -38,7 +38,7 @@ class LiteEthUDPCrossbar(LiteEthCrossbar): self.dw = dw LiteEthCrossbar.__init__(self, LiteEthUDPMasterPort, "dst_port", dw=dw) - def get_port(self, udp_port, dw=8, cd="sys", tx_buffer=False, rx_buffer=False): + def get_port(self, udp_port, dw=8, cd="sys"): if udp_port in self.users.keys(): raise ValueError("Port {0:#x} already assigned".format(udp_port)) @@ -48,12 +48,6 @@ class LiteEthUDPCrossbar(LiteEthCrossbar): # TX # --- - # Buffer. - if tx_buffer: - self.tx_buffer = tx_buffer = stream.Buffer(eth_udp_user_description(user_port.dw)) - self.comb += tx_buffer.source.connect(user_port.sink) - user_port.sink = tx_buffer.sink - # CDC. self.tx_cdc = tx_cdc = stream.ClockDomainCrossing( layout = eth_udp_user_description(user_port.dw), @@ -92,12 +86,6 @@ class LiteEthUDPCrossbar(LiteEthCrossbar): # Interface. self.comb += rx_cdc.source.connect(user_port.source) - # Buffer. - if rx_buffer: - self.rx_buffer = rx_buffer = stream.Buffer(eth_udp_user_description(user_port.dw)) - self.comb += user_port.source.connect(rx_buffer.sink) - user_port.source = rx_buffer.sink - # Expose/Return User Port. # ------------------------ self.users[udp_port] = internal_port diff --git a/liteeth/frontend/etherbone.py b/liteeth/frontend/etherbone.py index 989009a..bd560f9 100644 --- a/liteeth/frontend/etherbone.py +++ b/liteeth/frontend/etherbone.py @@ -125,7 +125,7 @@ class LiteEthEtherbonePacket(LiteXModule): def __init__(self, udp, udp_port, cd="sys"): self.tx = tx = LiteEthEtherbonePacketTX(udp_port) self.rx = rx = LiteEthEtherbonePacketRX() - udp_port = udp.crossbar.get_port(udp_port, dw=32, cd=cd, tx_buffer=True, rx_buffer=True) + udp_port = udp.crossbar.get_port(udp_port, dw=32, cd=cd) self.comb += [ tx.source.connect(udp_port.sink), udp_port.source.connect(rx.sink)