From d3b2f3d3611422a6363c35261005dcd4e0d40c02 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Sat, 23 Nov 2019 15:47:42 +0100 Subject: [PATCH] examples/targets: udpate analyzer --- examples/targets/base.py | 10 ++-------- examples/targets/etherbone.py | 10 ++-------- examples/targets/tty.py | 10 ++-------- examples/targets/udp.py | 10 ++-------- 4 files changed, 8 insertions(+), 32 deletions(-) diff --git a/examples/targets/base.py b/examples/targets/base.py index 91ac5ef..d9f2bbc 100644 --- a/examples/targets/base.py +++ b/examples/targets/base.py @@ -59,10 +59,6 @@ set_false_path -from [get_clocks eth_tx_clk] -to [get_clocks sys_clk] class BaseSoCDevel(BaseSoC): - csr_map = { - "analyzer": 20 - } - csr_map.update(BaseSoC.csr_map) def __init__(self, platform): from litescope import LiteScopeAnalyzer BaseSoC.__init__(self, platform) @@ -122,7 +118,8 @@ class BaseSoCDevel(BaseSoC): self.core_udp_rx_fsm_state, self.core_udp_tx_fsm_state ] - self.submodules.analyzer = LiteScopeAnalyzer(debug, 4096) + self.submodules.analyzer = LiteScopeAnalyzer(debug, 4096, csr_csv="test/analyzer.csv") + self.add_csr("analyzer") def do_finalize(self): BaseSoC.do_finalize(self) @@ -141,7 +138,4 @@ class BaseSoCDevel(BaseSoC): self.core_udp_tx_fsm_state.eq(self.core.udp.tx.fsm.state) ] - def do_exit(self, vns): - self.analyzer.export_csv(vns, "test/analyzer.csv") - default_subtarget = BaseSoC diff --git a/examples/targets/etherbone.py b/examples/targets/etherbone.py index 30585dd..e8f2d45 100644 --- a/examples/targets/etherbone.py +++ b/examples/targets/etherbone.py @@ -18,10 +18,6 @@ class EtherboneSoC(BaseSoC): class EtherboneSoCDevel(EtherboneSoC): - csr_map = { - "analyzer": 20 - } - csr_map.update(EtherboneSoC.csr_map) def __init__(self, platform): from litescope import LiteScopeAnalyzer EtherboneSoC.__init__(self, platform) @@ -61,9 +57,7 @@ class EtherboneSoCDevel(EtherboneSoC): self.etherbone.wishbone.bus.bte, self.etherbone.wishbone.bus.err ] - self.submodules.analyzer = LiteScopeAnalyzer(debug, 4096) - - def do_exit(self, vns): - self.analyzer.export_csv(vns, "test/analyzer.csv") + self.submodules.analyzer = LiteScopeAnalyzer(debug, 4096, csr_csv="test/analyzer.csv") + self.add_csr("analyzer") default_subtarget = EtherboneSoC diff --git a/examples/targets/tty.py b/examples/targets/tty.py index b7daf39..1e234a6 100644 --- a/examples/targets/tty.py +++ b/examples/targets/tty.py @@ -18,10 +18,6 @@ class TTYSoC(BaseSoC): class TTYSoCDevel(TTYSoC): - csr_map = { - "analyzer": 20 - } - csr_map.update(TTYSoC.csr_map) def __init__(self, platform): from litescope import LiteScopeAnalyzer TTYSoC.__init__(self, platform) @@ -34,9 +30,7 @@ class TTYSoCDevel(TTYSoC): self.tty.source.ready, self.tty.source.data ] - self.submodules.analyzer = LiteScopeAnalyzer(debug, 4096) - - def do_exit(self, vns): - self.analyzer.export_csv(vns, "test/analyzer.csv") + self.submodules.analyzer = LiteScopeAnalyzer(debug, 4096, csr_csv="test/analyzer.csv") + self.add_csr("analyzer") default_subtarget = TTYSoC diff --git a/examples/targets/udp.py b/examples/targets/udp.py index 9178e3d..6804ac0 100644 --- a/examples/targets/udp.py +++ b/examples/targets/udp.py @@ -29,10 +29,6 @@ class UDPSoC(BaseSoC): class UDPSoCDevel(UDPSoC): - csr_map = { - "analyzer": 20 - } - csr_map.update(UDPSoC.csr_map) def __init__(self, platform): from litescope import LiteScopeAnalyzer UDPSoC.__init__(self, platform) @@ -57,9 +53,7 @@ class UDPSoCDevel(UDPSoC): self.loopback_32.source.ready, self.loopback_32.source.data ] - self.submodules.analyzer = LiteScopeAnalyzer(debug, 4096) - - def do_exit(self, vns): - self.analyzer.export_csv(vns, "test/analyzer.csv") + self.submodules.analyzer = LiteScopeAnalyzer(debug, 4096, csr_csv="test/analyzer.csv") + self.add_csr("analyzer") default_subtarget = UDPSoC