test: update test_etherbone, use litex.gen.sim for all tests
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@ -34,8 +34,8 @@ class Etherbone(Module):
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print_etherbone(">>>>>>>>")
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print_etherbone(packet)
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udp_packet = udp.UDPPacket(packet)
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udp_packet.src_port = 0x1234 # XXX
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udp_packet.dst_port = 20000 # XXX
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udp_packet.src_port = 0x1234 # FIXME
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udp_packet.dst_port = 0x1234 # FIXME
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udp_packet.length = len(packet)
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udp_packet.checksum = 0
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self.udp.send(udp_packet)
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@ -80,7 +80,7 @@ class UDP(Module):
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ip_packet.fragment_offset = 0
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ip_packet.ttl = 0x80
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ip_packet.sender_ip = self.ip_address
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ip_packet.target_ip = 0x12345678 # XXX
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ip_packet.target_ip = 0x12345678 # FIXME
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ip_packet.checksum = 0
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ip_packet.protocol = udp_protocol
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self.ip.send(ip_packet)
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@ -97,6 +97,6 @@ class UDP(Module):
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self.process(packet)
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def process(self, packet):
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if packet.dst_port == 20000:
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if packet.dst_port == 0x1234: # FIXME
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if self.etherbone_callback is not None:
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self.etherbone_callback(packet)
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@ -14,6 +14,8 @@ from liteeth.frontend.etherbone import LiteEthEtherbone
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from test.model import phy, mac, arp, ip, udp, etherbone
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from litex.gen.sim import *
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ip_address = 0x12345678
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mac_address = 0x12345678abcd
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@ -28,10 +30,10 @@ class DUT(Module):
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self.submodules.etherbone_model = etherbone.Etherbone(self.udp_model, debug=False)
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self.submodules.core = LiteEthUDPIPCore(self.phy_model, mac_address, ip_address, 100000)
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self.submodules.etherbone = LiteEthEtherbone(self.core.udp, 1234)
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self.submodules.etherbone = LiteEthEtherbone(self.core.udp, 0x1234)
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self.submodules.sram = wishbone.SRAM(1024)
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self.submodules.interconnect = wishbone.InterconnectPointToPoint(self.etherbone.master.bus, self.sram.bus)
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self.submodules.interconnect = wishbone.InterconnectPointToPoint(self.etherbone.wishbone.bus, self.sram.bus)
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def main_generator(dut):
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@ -47,12 +49,11 @@ def main_generator(dut):
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yield from dut.etherbone_model.receive()
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print("probe: " + str(bool(dut.etherbone_model.rx_packet.pr)))
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for i in range(8):
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for i in range(2):
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# test writes
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if test_writes:
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writes_datas = [j for j in range(16)]
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writes = etherbone.EtherboneWrites(base_addr=0x1000,
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datas=writes_datas)
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writes_datas = [j for j in range(4)]
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writes = etherbone.EtherboneWrites(base_addr=0x1000, datas=writes_datas)
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record = etherbone.EtherboneRecord()
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record.writes = writes
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record.reads = None
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@ -74,9 +75,8 @@ def main_generator(dut):
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# test reads
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if test_reads:
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reads_addrs = [0x1000 + 4*j for j in range(16)]
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reads = etherbone.EtherboneReads(base_ret_addr=0x1000,
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addrs=reads_addrs)
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reads_addrs = [0x1000 + 4*j for j in range(4)]
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reads = etherbone.EtherboneReads(base_ret_addr=0x1000, addrs=reads_addrs)
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record = etherbone.EtherboneRecord()
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record.writes = None
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record.reads = reads
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@ -103,7 +103,7 @@ def main_generator(dut):
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class TestEtherbone(unittest.TestCase):
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def _test(self): # FIXME
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def test_etherbone(self):
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dut = DUT()
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generators = {
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"sys" : [main_generator(dut)],
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@ -17,6 +17,8 @@ from test.model.ip import *
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from test.model.icmp import *
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from test.model import phy, mac, arp, ip, icmp
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from litex.gen.sim import *
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ip_address = 0x12345678
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mac_address = 0x12345678abcd
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@ -13,6 +13,8 @@ from liteeth.core import LiteEthIPCore
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from test.model import phy, mac, arp, ip
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from litex.gen.sim import *
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ip_address = 0x12345678
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mac_address = 0x12345678abcd
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@ -13,6 +13,8 @@ from liteeth.mac.core import LiteEthMACCore
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from test.model import phy, mac
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from litex.gen.sim import *
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class DUT(Module):
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def __init__(self):
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@ -13,6 +13,8 @@ from liteeth.mac import LiteEthMAC
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from test.model import phy, mac
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from litex.gen.sim import *
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class WishboneMaster:
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def __init__(self, obj):
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@ -14,6 +14,7 @@ from test.model.udp import UDPPacket
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from litex.tools.remote.etherbone import *
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from test.model.etherbone import Etherbone
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from litex.gen.sim import *
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class TestModel(unittest.TestCase):
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def test_mac(self):
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@ -13,6 +13,8 @@ from liteeth.core import LiteEthUDPIPCore
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from test.model import phy, mac, arp, ip, udp
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from litex.gen.sim import *
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ip_address = 0x12345678
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mac_address = 0x12345678abcd
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