Florent Kermarrec
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e0f053e7a2
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bench: Set margin to 0 on 1000/2500BaseX reference clock generation.
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2024-07-10 15:39:04 +02:00 |
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Florent Kermarrec
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3e026795d8
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bench/xcu1525/xu8_st1: Directly add IOs in Etherbone section.
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2023-06-13 18:36:15 +02:00 |
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Florent Kermarrec
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cfe3201854
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phy/usp_gty_1000basex: Working :), remove debug.
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2023-06-13 17:30:20 +02:00 |
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Florent Kermarrec
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263eb1244f
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phy: Rename usp_1000basex to usp_gty_1000basex and update xcu1525.
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2023-06-13 16:33:22 +02:00 |
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Florent Kermarrec
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fa08ce1ccc
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bench: Update.
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2023-06-13 14:13:03 +02:00 |
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Florent Kermarrec
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028838e744
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phy/usp_1000basex: Update parameters from Xilinx PMA/PCS core.
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2023-06-12 16:28:17 +02:00 |
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Florent Kermarrec
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f00d95c534
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usp_1000basex: Update a few parameter and add debug probes to investigate on xcu1525.
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2023-06-08 17:56:37 +02:00 |
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Florent Kermarrec
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6d71adae2b
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bench: Use full imports.
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2022-05-02 13:09:28 +02:00 |
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Florent Kermarrec
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c294a3848e
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bench: Add XCU1525 bench (compiles but not yet working on hardware).
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2021-07-02 13:00:43 +02:00 |