73 lines
2.5 KiB
Python
73 lines
2.5 KiB
Python
#
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# This file is part of LiteEth.
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#
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# Copyright (c) 2015-2019 Florent Kermarrec <florent@enjoy-digital.fr>
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# SPDX-License-Identifier: BSD-2-Clause
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import unittest
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from migen import *
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from litex.soc.interconnect import wishbone
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from litex.soc.interconnect.stream_sim import *
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from liteeth.common import *
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from liteeth.mac.core import LiteEthMACCore
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from test.model import phy, mac
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from litex.gen.sim import *
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class DUT(Module):
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def __init__(self):
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self.submodules.phy_model = phy.PHY(8, debug=False)
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self.submodules.mac_model = mac.MAC(self.phy_model, debug=False, loopback=True)
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self.submodules.core = LiteEthMACCore(phy=self.phy_model, dw=8, with_preamble_crc=True)
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self.submodules.streamer = PacketStreamer(eth_phy_description(8), last_be=1)
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self.submodules.streamer_randomizer = Randomizer(eth_phy_description(8), level=50)
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self.submodules.logger_randomizer = Randomizer(eth_phy_description(8), level=50)
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self.submodules.logger = PacketLogger(eth_phy_description(8))
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self.comb += [
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Record.connect(self.streamer.source, self.streamer_randomizer.sink),
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Record.connect(self.streamer_randomizer.source, self.core.sink),
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Record.connect(self.core.source, self.logger_randomizer.sink),
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Record.connect(self.logger_randomizer.source, self.logger.sink)
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]
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def main_generator(dut):
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for i in range(2):
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packet = mac.MACPacket([i for i in range(64)])
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packet.target_mac = 0x010203040506
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packet.sender_mac = 0x090A0B0C0C0D
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packet.ethernet_type = 0x0800
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packet.encode_header()
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dut.streamer.send(packet)
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yield from dut.logger.receive()
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# check results
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s, l, e = check(packet, dut.logger.packet)
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print("shift " + str(s) + " / length " + str(l) + " / errors " + str(e))
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class TestMACCore(unittest.TestCase):
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def test(self):
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dut = DUT()
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generators = {
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"sys" : [main_generator(dut),
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dut.streamer.generator(),
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dut.streamer_randomizer.generator(),
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dut.logger_randomizer.generator(),
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dut.logger.generator()],
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"eth_tx": [dut.phy_model.phy_sink.generator(),
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dut.phy_model.generator()],
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"eth_rx": dut.phy_model.phy_source.generator()
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}
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clocks = {"sys": 10,
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"eth_rx": 10,
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"eth_tx": 10}
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run_simulation(dut, generators, clocks, vcd_name="sim.vcd")
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