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litescope
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implement memory flush in hardware instead of software

This commit is contained in:
Florent Kermarrec 2017-11-17 15:11:03 +01:00
parent c6c0812e62
commit 7757727f5b
2 changed files with 4 additions and 3 deletions
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4
litescope/core.py
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@ -119,6 +119,7 @@ class AnalyzerStorage(Module, AutoCSR):
self.wait = CSRStatus() self.wait = CSRStatus()
self.run = CSRStatus() self.run = CSRStatus()
self.mem_flush = CSR()
self.mem_valid = CSRStatus() self.mem_valid = CSRStatus()
self.mem_ready = CSR() self.mem_ready = CSR()
self.mem_data = CSRStatus(dw) self.mem_data = CSRStatus(dw)
@ -126,7 +127,8 @@ class AnalyzerStorage(Module, AutoCSR):
# # # # # #
mem = stream.SyncFIFO([("data", dw)], depth//cd_ratio, buffered=True) mem = stream.SyncFIFO([("data", dw)], depth//cd_ratio, buffered=True)
self.submodules += mem self.submodules += ResetInserter()(mem)
self.comb += mem.reset.eq(self.mem_flush.re)
fsm = FSM(reset_state="IDLE") fsm = FSM(reset_state="IDLE")
self.submodules += fsm self.submodules += fsm

3
litescope/software/driver/analyzer.py
View File

@ -74,8 +74,7 @@ class LiteScopeAnalyzerDriver:
self.frontend_subsampler_value.write(value-1) self.frontend_subsampler_value.write(value-1)
def run(self, offset, length): def run(self, offset, length):
while self.storage_mem_valid.read(): self.storage_mem_flush.write(1)
self.storage_mem_ready.write(1)
if self.debug: if self.debug:
print("[running]...") print("[running]...")
self.storage_offset.write(offset) self.storage_offset.write(offset)