diff --git a/litescope/core.py b/litescope/core.py
index 636076f..0ae3b8b 100644
--- a/litescope/core.py
+++ b/litescope/core.py
@@ -147,8 +147,7 @@ class _Storage(Module, AutoCSR):
         self.offset = CSRStorage(bits_for(depth))
 
         self.mem_valid = CSRStatus()
-        self.mem_ready = CSR()
-        self.mem_data = CSRStatus(data_width)
+        self.mem_data  = CSRStatus(data_width)
 
         # # #
 
@@ -223,7 +222,7 @@ class _Storage(Module, AutoCSR):
         # memory read
         self.comb += [
             self.mem_valid.status.eq(cdc.source.valid),
-            cdc.source.ready.eq(self.mem_ready.re | ~self.enable.storage),
+            cdc.source.ready.eq(self.mem_data.we | ~self.enable.storage),
             self.mem_data.status.eq(cdc.source.data)
         ]
 
diff --git a/litescope/software/driver/analyzer.py b/litescope/software/driver/analyzer.py
index 6876ec4..04baa38 100644
--- a/litescope/software/driver/analyzer.py
+++ b/litescope/software/driver/analyzer.py
@@ -125,8 +125,9 @@ class LiteScopeAnalyzerDriver:
                                                         ' ' * (20-20*position//length),
                                                         100*position//length))
                 sys.stdout.flush()
+            if not self.storage_mem_valid.read():
+                break
             self.data.append(self.storage_mem_data.read())
-            self.storage_mem_ready.write(1)
         if self.debug:
             print("")
         return self.data