README: update and rename example_designs to examples
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README
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README
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@ -18,27 +18,22 @@ LiteScope is part of LiteX libraries whose aims are to lower entry level of
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complex FPGA cores by providing simple, elegant and efficient implementations
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complex FPGA cores by providing simple, elegant and efficient implementations
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of components used in today's SoC such as Ethernet, SATA, PCIe, SDRAM Controller...
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of components used in today's SoC such as Ethernet, SATA, PCIe, SDRAM Controller...
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Since Python is used to describe the HDL, the core is highly and easily
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Using Migen to describe the HDL allows the core to be highly and easily configurable.
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configurable.
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LiteScope is built using LiteX and uses technologies developed in partnership with
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M-Labs Ltd:
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- Migen enables generating HDL with Python in an efficient way.
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- MiSoC provides the basic blocks to build a powerful and small footprint SoC.
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LiteScope can be used as LiteX library or can be integrated with your standard
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LiteScope can be used as LiteX library or can be integrated with your standard
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design flow by generating the verilog rtl that you will use as a standard core.
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design flow by generating the verilog rtl that you will use as a standard core.
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[> Features
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[> Features
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-----------
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-----------
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- IO peek and poke with LiteScopeIO
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- IO peek and poke with LiteScopeIO.
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- Logic analyser with LiteScopeAnalyzer:
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- Logic analyser with LiteScopeAnalyzer:
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- Subsampling
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- Subsampling.
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- Data storage in block rams
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- Data storage in Block RAM.
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- Configurable triggers.
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- Bridges:
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- Bridges:
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- UART2Wishbone (provided by LiteX)
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- UART <--> Wishbone (provided by LiteX)
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- Ethernet2Wishbone ("Etherbone") (provided by LiteEth)
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- Ethernet <--> Wishbone ("Etherbone") (provided by LiteEth)
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- PCIe2Wishbone (provided by LitePCIe)
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- PCIe <--> Wishbone (provided by LitePCIe)
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- Exports formats: .vcd, .sr(sigrok), .csv, .py, etc...
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- Exports formats: .vcd, .sr(sigrok), .csv, .py, etc...
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[> Proven
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[> Proven
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@ -68,7 +63,7 @@ enjoy-digital.fr.
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python3 setup.py develop
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python3 setup.py develop
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cd ..
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cd ..
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3. TODO: add/describe example design(s)
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3. TODO: add/describe examples
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[> Tests
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[> Tests
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--------
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--------
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2
setup.py
2
setup.py
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@ -31,6 +31,6 @@ setup(
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"Operating System :: OS Independent",
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"Operating System :: OS Independent",
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"Programming Language :: Python",
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"Programming Language :: Python",
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],
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],
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packages=find_packages(exclude=("test*", "sim*", "doc*", "example_designs*")),
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packages=find_packages(exclude=("test*", "sim*", "doc*", "examples*")),
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include_package_data=True,
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include_package_data=True,
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)
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)
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@ -3,9 +3,9 @@ PYTHON = python3
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CMD = PYTHONPATH=$(COREDIR) $(PYTHON)
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CMD = PYTHONPATH=$(COREDIR) $(PYTHON)
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example_designs:
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examples:
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cd ../example_designs && $(PYTHON) make.py -t simple -p de0nano -Ob run False build-bitstream
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cd ../examples && $(PYTHON) make.py -t simple -p de0nano -Ob run False build-bitstream
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cd ../example_designs && $(PYTHON) make.py -t simple -p kc705 -Ob run False build-bitstream
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cd ../examples && $(PYTHON) make.py -t simple -p kc705 -Ob run False build-bitstream
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cd ../example_designs && $(PYTHON) make.py -t core build-core
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cd ../examples && $(PYTHON) make.py -t core build-core
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all: example_designs
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all: examples
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