core: add FSM support (and example)

example_designs/targets/simple.py

@@ -59,6 +59,19 @@ class LiteScopeSoC(SoCCore):
             self.cpu_or_bridge.wishbone
         ]
 
+        # fsm group
+        fsm = FSM(reset_state="STATE1")
+        self.submodules += fsm
+        fsm.act("STATE1",
+            NextState("STATE2")
+        )
+        fsm.act("STATE2",
+            NextState("STATE1")
+        )
+        analyzer_groups[2] = [
+            fsm
+        ]
+
         # analyzer
         self.submodules.analyzer = LiteScopeAnalyzer(analyzer_groups, 512)
 

litescope/core.py

@@ -274,6 +274,10 @@ class LiteScopeAnalyzer(Module, AutoCSR):
             for s in signals:
                 if isinstance(s, Record):
                     split_signals.extend(s.flatten())
+                elif isinstance(s, FSM):
+                    s.do_finalize()
+                    s.finalized = True
+                    split_signals.append(s.state)
                 else:
                     split_signals.append(s)
             new_groups[n] = split_signals