diff --git a/litex_boards/platforms/alveo_u250.py b/litex_boards/platforms/alveo_u250.py
index 2eb9d64..89f84bc 100644
--- a/litex_boards/platforms/alveo_u250.py
+++ b/litex_boards/platforms/alveo_u250.py
@@ -323,6 +323,10 @@ class Platform(XilinxPlatform):
 
     def do_finalize(self, fragment):
         XilinxPlatform.do_finalize(self, fragment)
+        self.add_period_constraint(self.lookup_request("clk300", 0, loose=True), 1e9/300e6)
+        self.add_period_constraint(self.lookup_request("clk300", 1, loose=True), 1e9/300e6)
+        self.add_period_constraint(self.lookup_request("clk300", 2, loose=True), 1e9/300e6)
+        self.add_period_constraint(self.lookup_request("clk300", 3, loose=True), 1e9/300e6)
         # For passively cooled boards, overheating is a significant risk if airflow isn't sufficient
         self.add_platform_command("set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN ENABLE [current_design]")
         # Reduce programming time